1. Field of the Invention
The present invention relates to programmable integrated circuit devices such as field programmable gate arrays (“FPGAs”). More particularly, the present invention relates to flash-based FPGA integrated circuits having secure reprogramming features.
2. The Prior Art
Flash electrically erasable programmable read-only memory (EEPROM) systems are commonly used as non-volatile memories in many electronic devices, including programmable logic devices such as FPGAs. Although the term “flash” often refers to memories that are bulk erased on a page-by-page, sector-by-sector, or entire array basis, the term is generally used in the art to refer to any electrically erasable (and re-programmable) non-volatile memory technology, regardless of the particular erase scheme. The most common flash memory cells are comprised of floating-gate transistors, though other flash technologies such as SONOS, nano-crystal, and other non-volatile transistors are also known. Periodically, flash-based devices such as FPGA devices may be reprogrammed in the field in order to change the configuration of the device or to refresh the original program. Over time and negatively influenced by high temperature, the voltage of a flash configuration cell may degrade eventually resulting in functional failures, resulting in the need to refresh the program. Also, program changes due to technology upgrades and bug fixes, etc. can lead to a need to change the original program of a flash-based device in the field. An example of a flash-based FPGA is the ProASIC® line of products available from Actel Corporation, Mountain View, Calif.
The prior-art method to solve this problem was for a customer to reprogram the device from an external source. This required one of the following: the device be brought “in house” to be reprogrammed; a technician be sent to the customer to re-program the device; the program be stored in the system in a memory (such as a hard disk) and external system “intelligence” be used to reprogram the device; or the device be reprogrammed via a network connection such as the internet.
The first two of these alternatives are logistically difficult and expensive. The third alternative requires significant system intelligence to program the device while it is not operational. In addition, this method requires exposure of the bit stream, which may compromise security of the design. The fourth alternative also requires exposure of the bit stream, which may compromise security of the design.
Other memory technologies, such as DRAM, also require methods to refresh voltage levels to prevent loss of data. However, the methods used to refresh flash memory differ dramatically from those used to refresh other technologies.